[ADT] Make use of subsetOf and anyCommon methods of BitVector (NFC) #170876

atrosinenko · 2025-12-05T15:55:59Z

Replace the code along these lines

BitVector Tmp = LHS;
Tmp &= RHS;
return Tmp.any();

and

BitVector Tmp = LHS;
Tmp.reset(RHS);
return Tmp.none();

with LHS.anyCommon(RHS) and LHS.subsetOf(RHS), correspondingly, which
do not require creating temporary BitVector and can return early.

atrosinenko · 2025-12-05T15:56:23Z

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llvmbot · 2025-12-05T16:01:51Z

@llvm/pr-subscribers-bolt

Author: Anatoly Trosinenko (atrosinenko)

Changes

Replace the code along these lines

BitVector Tmp = LHS;
Tmp &amp;= RHS;
return Tmp.any();

and

BitVector Tmp = LHS;
Tmp.reset(RHS);
return Tmp.none();

with LHS.anyCommon(RHS) and LHS.subsetOf(RHS), correspondingly, which
do not require creating temporary BitVector and can return early.

Full diff: https://github.com/llvm/llvm-project/pull/170876.diff

8 Files Affected:

(modified) bolt/include/bolt/Passes/LivenessAnalysis.h (+2-3)
(modified) bolt/include/bolt/Passes/ReachingDefOrUse.h (+1-2)
(modified) bolt/lib/Passes/RegReAssign.cpp (+2-6)
(modified) bolt/lib/Passes/ShrinkWrapping.cpp (+4-6)
(modified) bolt/lib/Passes/StackAvailableExpressions.cpp (+1-2)
(modified) bolt/lib/Passes/TailDuplication.cpp (+4-4)
(modified) llvm/lib/CodeGen/RDFRegisters.cpp (+2-4)
(modified) llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp (+2-4)

diff --git a/bolt/include/bolt/Passes/LivenessAnalysis.h b/bolt/include/bolt/Passes/LivenessAnalysis.h
index 1df1113318d0b..f4faa1dc34ecd 100644
--- a/bolt/include/bolt/Passes/LivenessAnalysis.h
+++ b/bolt/include/bolt/Passes/LivenessAnalysis.h
@@ -37,10 +37,9 @@ class LivenessAnalysis : public DataflowAnalysis<LivenessAnalysis, BitVector,
   virtual ~LivenessAnalysis();
 
   bool isAlive(ProgramPoint PP, MCPhysReg Reg) const {
-    BitVector BV = (*this->getStateAt(PP));
+    const BitVector &BV = *this->getStateAt(PP);
     const BitVector &RegAliases = BC.MIB->getAliases(Reg);
-    BV &= RegAliases;
-    return BV.any();
+    return BV.anyCommon(RegAliases);
   }
 
   void run() { Parent::run(); }
diff --git a/bolt/include/bolt/Passes/ReachingDefOrUse.h b/bolt/include/bolt/Passes/ReachingDefOrUse.h
index 585d673e3b84e..41a6091aad4cb 100644
--- a/bolt/include/bolt/Passes/ReachingDefOrUse.h
+++ b/bolt/include/bolt/Passes/ReachingDefOrUse.h
@@ -133,8 +133,7 @@ class ReachingDefOrUse
           RA.getInstClobberList(Point, Regs);
         else
           RA.getInstUsedRegsList(Point, Regs, false);
-        Regs &= this->BC.MIB->getAliases(*TrackingReg);
-        if (Regs.any())
+        if (Regs.anyCommon(this->BC.MIB->getAliases(*TrackingReg)))
           Next.set(this->ExprToIdx[&Point]);
       }
     }
diff --git a/bolt/lib/Passes/RegReAssign.cpp b/bolt/lib/Passes/RegReAssign.cpp
index 0859cd244ce40..54eff51bfee68 100644
--- a/bolt/lib/Passes/RegReAssign.cpp
+++ b/bolt/lib/Passes/RegReAssign.cpp
@@ -316,18 +316,14 @@ void RegReAssign::aggressivePassOverFunction(BinaryFunction &Function) {
       break;
     }
 
-    BitVector AnyAliasAlive = AliveAtStart;
-    AnyAliasAlive &= BC.MIB->getAliases(ClassicReg);
-    if (AnyAliasAlive.any()) {
+    if (AliveAtStart.anyCommon(BC.MIB->getAliases(ClassicReg))) {
       LLVM_DEBUG(dbgs() << " Bailed on " << BC.MRI->getName(ClassicReg)
                         << " with " << BC.MRI->getName(ExtReg)
                         << " because classic reg is alive\n");
       --End;
       continue;
     }
-    AnyAliasAlive = AliveAtStart;
-    AnyAliasAlive &= BC.MIB->getAliases(ExtReg);
-    if (AnyAliasAlive.any()) {
+    if (AliveAtStart.anyCommon(BC.MIB->getAliases(ExtReg))) {
       LLVM_DEBUG(dbgs() << " Bailed on " << BC.MRI->getName(ClassicReg)
                         << " with " << BC.MRI->getName(ExtReg)
                         << " because extended reg is alive\n");
diff --git a/bolt/lib/Passes/ShrinkWrapping.cpp b/bolt/lib/Passes/ShrinkWrapping.cpp
index fe342ccd38a67..b882e2512866d 100644
--- a/bolt/lib/Passes/ShrinkWrapping.cpp
+++ b/bolt/lib/Passes/ShrinkWrapping.cpp
@@ -1100,9 +1100,8 @@ SmallVector<ProgramPoint, 4> ShrinkWrapping::fixPopsPlacements(
     bool Found = false;
     if (SPT.getStateAt(ProgramPoint::getLastPointAt(*BB))->first ==
         SaveOffset) {
-      BitVector BV = *RI.getStateAt(ProgramPoint::getLastPointAt(*BB));
-      BV &= UsesByReg[CSR];
-      if (!BV.any()) {
+      const BitVector &BV = *RI.getStateAt(ProgramPoint::getLastPointAt(*BB));
+      if (!BV.anyCommon(UsesByReg[CSR])) {
         Found = true;
         PP = BB;
         continue;
@@ -1110,9 +1109,8 @@ SmallVector<ProgramPoint, 4> ShrinkWrapping::fixPopsPlacements(
     }
     for (MCInst &Inst : llvm::reverse(*BB)) {
       if (SPT.getStateBefore(Inst)->first == SaveOffset) {
-        BitVector BV = *RI.getStateAt(Inst);
-        BV &= UsesByReg[CSR];
-        if (!BV.any()) {
+        const BitVector &BV = *RI.getStateAt(Inst);
+        if (!BV.anyCommon(UsesByReg[CSR])) {
           Found = true;
           PP = &Inst;
           break;
diff --git a/bolt/lib/Passes/StackAvailableExpressions.cpp b/bolt/lib/Passes/StackAvailableExpressions.cpp
index a0d361f273de2..c685cc19badc3 100644
--- a/bolt/lib/Passes/StackAvailableExpressions.cpp
+++ b/bolt/lib/Passes/StackAvailableExpressions.cpp
@@ -103,8 +103,7 @@ bool StackAvailableExpressions::doesXKillsY(const MCInst *X, const MCInst *Y) {
   else
     RA.getInstClobberList(*Y, YClobbers);
 
-  XClobbers &= YClobbers;
-  return XClobbers.any();
+  return XClobbers.anyCommon(YClobbers);
 }
 
 BitVector StackAvailableExpressions::computeNext(const MCInst &Point,
diff --git a/bolt/lib/Passes/TailDuplication.cpp b/bolt/lib/Passes/TailDuplication.cpp
index 354f9b78830c3..e3ecf94a85070 100644
--- a/bolt/lib/Passes/TailDuplication.cpp
+++ b/bolt/lib/Passes/TailDuplication.cpp
@@ -97,8 +97,8 @@ bool TailDuplication::regIsPossiblyOverwritten(const MCInst &Inst, unsigned Reg,
   getCallerSavedRegs(Inst, WrittenRegs, BC);
   if (BC.MIB->isRep(Inst))
     BC.MIB->getRepRegs(WrittenRegs);
-  WrittenRegs &= BC.MIB->getAliases(Reg, false);
-  return WrittenRegs.any();
+  const BitVector &AllAliases = BC.MIB->getAliases(Reg, false);
+  return WrittenRegs.anyCommon(AllAliases);
 }
 
 bool TailDuplication::regIsDefinitelyOverwritten(const MCInst &Inst,
@@ -117,8 +117,8 @@ bool TailDuplication::regIsUsed(const MCInst &Inst, unsigned Reg,
                                 BinaryContext &BC) const {
   BitVector SrcRegs = BitVector(BC.MRI->getNumRegs(), false);
   BC.MIB->getSrcRegs(Inst, SrcRegs);
-  SrcRegs &= BC.MIB->getAliases(Reg, true);
-  return SrcRegs.any();
+  const BitVector &SmallerAliases = BC.MIB->getAliases(Reg, true);
+  return SrcRegs.anyCommon(SmallerAliases);
 }
 
 bool TailDuplication::isOverwrittenBeforeUsed(BinaryBasicBlock &StartBB,
diff --git a/llvm/lib/CodeGen/RDFRegisters.cpp b/llvm/lib/CodeGen/RDFRegisters.cpp
index 80fad722f592a..ee3e531c6fd5a 100644
--- a/llvm/lib/CodeGen/RDFRegisters.cpp
+++ b/llvm/lib/CodeGen/RDFRegisters.cpp
@@ -287,10 +287,8 @@ bool RegisterAggr::hasAliasOf(RegisterRef RR) const {
 }
 
 bool RegisterAggr::hasCoverOf(RegisterRef RR) const {
-  if (RR.isMask()) {
-    BitVector T(PRI.getMaskUnits(RR));
-    return T.reset(Units).none();
-  }
+  if (RR.isMask())
+    return PRI.getMaskUnits(RR).subsetOf(Units);
 
   for (MCRegUnitMaskIterator U(RR.asMCReg(), &PRI.getTRI()); U.isValid(); ++U) {
     auto [Unit, LaneMask] = *U;
diff --git a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
index 86d4e197b6063..b6c868c960828 100644
--- a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
+++ b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
@@ -274,11 +274,9 @@ static Error randomizeMCOperand(const LLVMState &State,
     break;
   case MCOI::OperandType::OPERAND_REGISTER: {
     assert(Op.isReg());
-    auto AllowedRegs = Op.getRegisterAliasing().sourceBits();
+    const BitVector &AllowedRegs = Op.getRegisterAliasing().sourceBits();
     assert(AllowedRegs.size() == ForbiddenRegs.size());
-    for (auto I : ForbiddenRegs.set_bits())
-      AllowedRegs.reset(I);
-    if (!AllowedRegs.any())
+    if (AllowedRegs.subsetOf(ForbiddenRegs))
       return make_error<Failure>(
           Twine("no available registers:\ncandidates:\n")
               .concat(debugString(State.getRegInfo(),

llvmbot · 2025-12-05T16:01:52Z

@llvm/pr-subscribers-tools-llvm-exegesis

Author: Anatoly Trosinenko (atrosinenko)

Changes

Replace the code along these lines

BitVector Tmp = LHS;
Tmp &amp;= RHS;
return Tmp.any();

and

BitVector Tmp = LHS;
Tmp.reset(RHS);
return Tmp.none();

with LHS.anyCommon(RHS) and LHS.subsetOf(RHS), correspondingly, which
do not require creating temporary BitVector and can return early.

Full diff: https://github.com/llvm/llvm-project/pull/170876.diff

8 Files Affected:

(modified) bolt/include/bolt/Passes/LivenessAnalysis.h (+2-3)
(modified) bolt/include/bolt/Passes/ReachingDefOrUse.h (+1-2)
(modified) bolt/lib/Passes/RegReAssign.cpp (+2-6)
(modified) bolt/lib/Passes/ShrinkWrapping.cpp (+4-6)
(modified) bolt/lib/Passes/StackAvailableExpressions.cpp (+1-2)
(modified) bolt/lib/Passes/TailDuplication.cpp (+4-4)
(modified) llvm/lib/CodeGen/RDFRegisters.cpp (+2-4)
(modified) llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp (+2-4)

diff --git a/bolt/include/bolt/Passes/LivenessAnalysis.h b/bolt/include/bolt/Passes/LivenessAnalysis.h
index 1df1113318d0b..f4faa1dc34ecd 100644
--- a/bolt/include/bolt/Passes/LivenessAnalysis.h
+++ b/bolt/include/bolt/Passes/LivenessAnalysis.h
@@ -37,10 +37,9 @@ class LivenessAnalysis : public DataflowAnalysis<LivenessAnalysis, BitVector,
   virtual ~LivenessAnalysis();
 
   bool isAlive(ProgramPoint PP, MCPhysReg Reg) const {
-    BitVector BV = (*this->getStateAt(PP));
+    const BitVector &BV = *this->getStateAt(PP);
     const BitVector &RegAliases = BC.MIB->getAliases(Reg);
-    BV &= RegAliases;
-    return BV.any();
+    return BV.anyCommon(RegAliases);
   }
 
   void run() { Parent::run(); }
diff --git a/bolt/include/bolt/Passes/ReachingDefOrUse.h b/bolt/include/bolt/Passes/ReachingDefOrUse.h
index 585d673e3b84e..41a6091aad4cb 100644
--- a/bolt/include/bolt/Passes/ReachingDefOrUse.h
+++ b/bolt/include/bolt/Passes/ReachingDefOrUse.h
@@ -133,8 +133,7 @@ class ReachingDefOrUse
           RA.getInstClobberList(Point, Regs);
         else
           RA.getInstUsedRegsList(Point, Regs, false);
-        Regs &= this->BC.MIB->getAliases(*TrackingReg);
-        if (Regs.any())
+        if (Regs.anyCommon(this->BC.MIB->getAliases(*TrackingReg)))
           Next.set(this->ExprToIdx[&Point]);
       }
     }
diff --git a/bolt/lib/Passes/RegReAssign.cpp b/bolt/lib/Passes/RegReAssign.cpp
index 0859cd244ce40..54eff51bfee68 100644
--- a/bolt/lib/Passes/RegReAssign.cpp
+++ b/bolt/lib/Passes/RegReAssign.cpp
@@ -316,18 +316,14 @@ void RegReAssign::aggressivePassOverFunction(BinaryFunction &Function) {
       break;
     }
 
-    BitVector AnyAliasAlive = AliveAtStart;
-    AnyAliasAlive &= BC.MIB->getAliases(ClassicReg);
-    if (AnyAliasAlive.any()) {
+    if (AliveAtStart.anyCommon(BC.MIB->getAliases(ClassicReg))) {
       LLVM_DEBUG(dbgs() << " Bailed on " << BC.MRI->getName(ClassicReg)
                         << " with " << BC.MRI->getName(ExtReg)
                         << " because classic reg is alive\n");
       --End;
       continue;
     }
-    AnyAliasAlive = AliveAtStart;
-    AnyAliasAlive &= BC.MIB->getAliases(ExtReg);
-    if (AnyAliasAlive.any()) {
+    if (AliveAtStart.anyCommon(BC.MIB->getAliases(ExtReg))) {
       LLVM_DEBUG(dbgs() << " Bailed on " << BC.MRI->getName(ClassicReg)
                         << " with " << BC.MRI->getName(ExtReg)
                         << " because extended reg is alive\n");
diff --git a/bolt/lib/Passes/ShrinkWrapping.cpp b/bolt/lib/Passes/ShrinkWrapping.cpp
index fe342ccd38a67..b882e2512866d 100644
--- a/bolt/lib/Passes/ShrinkWrapping.cpp
+++ b/bolt/lib/Passes/ShrinkWrapping.cpp
@@ -1100,9 +1100,8 @@ SmallVector<ProgramPoint, 4> ShrinkWrapping::fixPopsPlacements(
     bool Found = false;
     if (SPT.getStateAt(ProgramPoint::getLastPointAt(*BB))->first ==
         SaveOffset) {
-      BitVector BV = *RI.getStateAt(ProgramPoint::getLastPointAt(*BB));
-      BV &= UsesByReg[CSR];
-      if (!BV.any()) {
+      const BitVector &BV = *RI.getStateAt(ProgramPoint::getLastPointAt(*BB));
+      if (!BV.anyCommon(UsesByReg[CSR])) {
         Found = true;
         PP = BB;
         continue;
@@ -1110,9 +1109,8 @@ SmallVector<ProgramPoint, 4> ShrinkWrapping::fixPopsPlacements(
     }
     for (MCInst &Inst : llvm::reverse(*BB)) {
       if (SPT.getStateBefore(Inst)->first == SaveOffset) {
-        BitVector BV = *RI.getStateAt(Inst);
-        BV &= UsesByReg[CSR];
-        if (!BV.any()) {
+        const BitVector &BV = *RI.getStateAt(Inst);
+        if (!BV.anyCommon(UsesByReg[CSR])) {
           Found = true;
           PP = &Inst;
           break;
diff --git a/bolt/lib/Passes/StackAvailableExpressions.cpp b/bolt/lib/Passes/StackAvailableExpressions.cpp
index a0d361f273de2..c685cc19badc3 100644
--- a/bolt/lib/Passes/StackAvailableExpressions.cpp
+++ b/bolt/lib/Passes/StackAvailableExpressions.cpp
@@ -103,8 +103,7 @@ bool StackAvailableExpressions::doesXKillsY(const MCInst *X, const MCInst *Y) {
   else
     RA.getInstClobberList(*Y, YClobbers);
 
-  XClobbers &= YClobbers;
-  return XClobbers.any();
+  return XClobbers.anyCommon(YClobbers);
 }
 
 BitVector StackAvailableExpressions::computeNext(const MCInst &Point,
diff --git a/bolt/lib/Passes/TailDuplication.cpp b/bolt/lib/Passes/TailDuplication.cpp
index 354f9b78830c3..e3ecf94a85070 100644
--- a/bolt/lib/Passes/TailDuplication.cpp
+++ b/bolt/lib/Passes/TailDuplication.cpp
@@ -97,8 +97,8 @@ bool TailDuplication::regIsPossiblyOverwritten(const MCInst &Inst, unsigned Reg,
   getCallerSavedRegs(Inst, WrittenRegs, BC);
   if (BC.MIB->isRep(Inst))
     BC.MIB->getRepRegs(WrittenRegs);
-  WrittenRegs &= BC.MIB->getAliases(Reg, false);
-  return WrittenRegs.any();
+  const BitVector &AllAliases = BC.MIB->getAliases(Reg, false);
+  return WrittenRegs.anyCommon(AllAliases);
 }
 
 bool TailDuplication::regIsDefinitelyOverwritten(const MCInst &Inst,
@@ -117,8 +117,8 @@ bool TailDuplication::regIsUsed(const MCInst &Inst, unsigned Reg,
                                 BinaryContext &BC) const {
   BitVector SrcRegs = BitVector(BC.MRI->getNumRegs(), false);
   BC.MIB->getSrcRegs(Inst, SrcRegs);
-  SrcRegs &= BC.MIB->getAliases(Reg, true);
-  return SrcRegs.any();
+  const BitVector &SmallerAliases = BC.MIB->getAliases(Reg, true);
+  return SrcRegs.anyCommon(SmallerAliases);
 }
 
 bool TailDuplication::isOverwrittenBeforeUsed(BinaryBasicBlock &StartBB,
diff --git a/llvm/lib/CodeGen/RDFRegisters.cpp b/llvm/lib/CodeGen/RDFRegisters.cpp
index 80fad722f592a..ee3e531c6fd5a 100644
--- a/llvm/lib/CodeGen/RDFRegisters.cpp
+++ b/llvm/lib/CodeGen/RDFRegisters.cpp
@@ -287,10 +287,8 @@ bool RegisterAggr::hasAliasOf(RegisterRef RR) const {
 }
 
 bool RegisterAggr::hasCoverOf(RegisterRef RR) const {
-  if (RR.isMask()) {
-    BitVector T(PRI.getMaskUnits(RR));
-    return T.reset(Units).none();
-  }
+  if (RR.isMask())
+    return PRI.getMaskUnits(RR).subsetOf(Units);
 
   for (MCRegUnitMaskIterator U(RR.asMCReg(), &PRI.getTRI()); U.isValid(); ++U) {
     auto [Unit, LaneMask] = *U;
diff --git a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
index 86d4e197b6063..b6c868c960828 100644
--- a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
+++ b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
@@ -274,11 +274,9 @@ static Error randomizeMCOperand(const LLVMState &State,
     break;
   case MCOI::OperandType::OPERAND_REGISTER: {
     assert(Op.isReg());
-    auto AllowedRegs = Op.getRegisterAliasing().sourceBits();
+    const BitVector &AllowedRegs = Op.getRegisterAliasing().sourceBits();
     assert(AllowedRegs.size() == ForbiddenRegs.size());
-    for (auto I : ForbiddenRegs.set_bits())
-      AllowedRegs.reset(I);
-    if (!AllowedRegs.any())
+    if (AllowedRegs.subsetOf(ForbiddenRegs))
       return make_error<Failure>(
           Twine("no available registers:\ncandidates:\n")
               .concat(debugString(State.getRegInfo(),

kuhar

~~Can you add unit tests?~~ Wrong PR

atrosinenko

Will fix soon.

PS: Well, I cannot Approve my own PR, this is reasonable, but why I cannot Request changes? :)

atrosinenko · 2025-12-11T10:09:19Z

llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp

-    for (auto I : ForbiddenRegs.set_bits())
-      AllowedRegs.reset(I);
-    if (!AllowedRegs.any())
+    if (AllowedRegs.subsetOf(ForbiddenRegs))


Sorry, just spotted that the change in this line is incorrect due to AllowedRegs being later used as

AssignedValue = MCOperand::createReg(randomBit(AllowedRegs));

Reverted this particular change in b0f5356.

Replace the code along these lines BitVector Tmp = LHS; Tmp &= RHS; return Tmp.any(); and BitVector Tmp = LHS; Tmp.reset(RHS); return Tmp.none(); with `LHS.anyCommon(RHS)` and `LHS.subsetOf(RHS)`, correspondingly, which do not require creating temporary BitVector and can return early.

atrosinenko

Sorry for the delay, I rolled back the particular change to SnippetGenerator.cpp and checked once again that the conversions of BitVector BV = ... to const BitVector &BV = ... are legal and that there are no more reads from the bit vectors past the subsetOf or anyCommon calls.

I assume it should be safe for me to merge this as-is, as the final change is strictly a subset of the original one.

It still may make sense to simplify a couple places under llvm/tools/llvm-exegesis/ where iteration over set_bits() is immediately followed by reset(unsigned) calls, but it is probably reasonable to do in a separate PR (if at all), not to miss any subtle detail (such as would assert(LHS.size() == RHS.size()) still be required for anything else).

atrosinenko · 2025-12-22T11:39:22Z

llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp

-    for (auto I : ForbiddenRegs.set_bits())
-      AllowedRegs.reset(I);
-    if (!AllowedRegs.any())
+    if (AllowedRegs.subsetOf(ForbiddenRegs))


Reverted this particular change in b0f5356.

…lvm#170876) Replace the code along these lines BitVector Tmp = LHS; Tmp &= RHS; return Tmp.any(); and BitVector Tmp = LHS; Tmp.reset(RHS); return Tmp.none(); with `LHS.anyCommon(RHS)` and `LHS.subsetOf(RHS)`, correspondingly, which do not require creating temporary BitVector and can return early.

kuhar · 2025-12-29T18:01:09Z

llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp

+    auto AllowedRegs = Op.getRegisterAliasing().sourceBits();
    assert(AllowedRegs.size() == ForbiddenRegs.size());
-    if (AllowedRegs.subsetOf(ForbiddenRegs))
+    for (auto I : ForbiddenRegs.set_bits())


nit: these types should be spelled out since they are not obvious based on the immediate context per https://llvm.org/docs/CodingStandards.html#use-auto-type-deduction-to-make-code-more-readable

…lvm#170876) Replace the code along these lines BitVector Tmp = LHS; Tmp &= RHS; return Tmp.any(); and BitVector Tmp = LHS; Tmp.reset(RHS); return Tmp.none(); with `LHS.anyCommon(RHS)` and `LHS.subsetOf(RHS)`, correspondingly, which do not require creating temporary BitVector and can return early.

atrosinenko mentioned this pull request Dec 5, 2025

[ADT] BitVector: give subsetOf(RHS) name to !test(RHS) (NFC) #170875

Merged

atrosinenko requested review from asl, kazutakahirata and kuhar December 5, 2025 16:01

atrosinenko marked this pull request as ready for review December 5, 2025 16:01

atrosinenko requested review from aaupov, ayermolo, maksfb, paschalis-mpeis, rafaelauler, yota9 and yozhu as code owners December 5, 2025 16:01

llvmbot added tools:llvm-exegesis llvm:codegen BOLT labels Dec 5, 2025

aaupov approved these changes Dec 5, 2025

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kuhar reviewed Dec 5, 2025

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kuhar approved these changes Dec 5, 2025

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atrosinenko force-pushed the users/atrosinenko/bitvector-subsetof-and-anycommon branch 2 times, most recently from 52dbe76 to 24957f7 Compare December 8, 2025 12:37

atrosinenko force-pushed the users/atrosinenko/bitvector-define-subsetof branch from dcefe31 to 7c35ff5 Compare December 8, 2025 12:37

atrosinenko force-pushed the users/atrosinenko/bitvector-subsetof-and-anycommon branch from 24957f7 to fb3eff2 Compare December 8, 2025 15:42

kuhar approved these changes Dec 8, 2025

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Base automatically changed from users/atrosinenko/bitvector-define-subsetof to main December 9, 2025 18:00

atrosinenko force-pushed the users/atrosinenko/bitvector-subsetof-and-anycommon branch from fb3eff2 to 60e01b7 Compare December 9, 2025 19:55

atrosinenko commented Dec 11, 2025

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atrosinenko force-pushed the users/atrosinenko/bitvector-subsetof-and-anycommon branch from 60e01b7 to 2f79e84 Compare December 18, 2025 16:25

Revert incorrect change

b0f5356

atrosinenko commented Dec 22, 2025

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atrosinenko removed the tools:llvm-exegesis label Dec 23, 2025

atrosinenko merged commit 96ee7d2 into main Dec 23, 2025
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atrosinenko deleted the users/atrosinenko/bitvector-subsetof-and-anycommon branch December 23, 2025 08:57

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[ADT] Make use of subsetOf and anyCommon methods of BitVector (NFC) #170876

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[ADT] Make use of subsetOf and anyCommon methods of BitVector (NFC) #170876

[ADT] Make use of subsetOf and anyCommon methods of BitVector (NFC) #170876

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atrosinenko commented Dec 5, 2025

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atrosinenko commented Dec 5, 2025 •

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